What benchmarks can I run with this skill?

The skill supports running Dhrystone, Coremark, and Linux boot binaries within a parent simulator to verify system-level integration.

How does it handle long-running simulations?

It uses managed timeouts (e.g., 20s or 60s) for simulation tasks to ensure that verification processes remain efficient and don't hang.

Can I run tests in standalone mode?

Absolutely. The skill provides dedicated commands for standalone unit tests and smoke demos that run independently of the parent simulator.

Does it require a specific build system?

Yes, the skill is designed to work with CMake for project configuration and CTest for automated test execution.

Does this skill support both AXI3 and AXI4?

Yes, it includes specific commands and build flags to verify both AXI3 and AXI4 protocol implementations.

AXI Interconnect Verification

Name: AXI Interconnect Verification
Author: dyh1807

bydyh1807

0•

Seguridad y Pruebas

Verifies AXI interconnect designs through automated unit tests, smoke demos, and parent simulator integration checks.

The axi-kit-verify skill provides a specialized workflow for validating AXI-Interconnect interfaces, specifically tailored for designs with 4-Read and 2-Write Masters. It automates the entire verification pipeline, from standalone CTest execution and protocol smoke demos to complex integration checks within parent simulators. By supporting both AXI3 and AXI4 protocols and facilitating benchmark tests like Dhrystone, Coremark, and Linux boot sequences, this skill ensures that bus interconnect logic is robust, performant, and ready for SoC integration.

Características Principales

01Protocol-specific smoke demos for rapid AXI3 and AXI4 interface validation

02Automated CMake build and CTest orchestration for standalone unit testing

030 GitHub stars

04Automated benchmark execution including Dhrystone and Coremark

05Support for long-running integration checks with managed timeouts for Linux binaries

06Parent simulator integration with configurable DDR simulation flags

Casos de Uso

01Benchmarking interconnect performance under realistic bare-metal and OS workloads

02Validating multi-master AXI interconnect logic during RTL development

03Running regression tests to ensure bus stability after architectural changes

What are Skills?·How to Install

Install with 🐟 Skill.Fish

npx skillfish add dyh1807/axi-interconnect-kit axi-kit-verify

For use in Claude.ai and ChatGPT

Download Skill