How does 'Expand Mode' help with hardware design?

When a request is ambiguous, the router enters Expand Mode to ask 2-3 clarifying questions about interfaces, protocols, and constraints, ensuring the final output matches your architectural intent.

What happens if the router is unsure about my request?

If confidence is below 85%, it triggers a clarification flow. If confidence is very low (below 70%), it will ask you to rephrase the request to avoid incorrect code generation.

Can it distinguish between different types of SystemVerilog tasks?

Yes, it uses semantic analysis rather than simple keywords to distinguish between creating RTL, writing testbenches, reporting bugs, or performing architectural planning.

What is the primary function of the GateFlow Intent Router?

It acts as a traffic controller that interprets your natural language requests and directs them to the specific GateFlow sub-agent best suited for the task, such as the RTL generator or the debugger.

Does this skill work with existing codebases?

Absolutely. It can route requests to analyze existing files, find bugs in current RTL, or add assertions to your existing verification environment.

GateFlow Intent Router

Name: GateFlow Intent Router
Author: codejunkie99

bycodejunkie99

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生産性とワークフロー

Orchestrates SystemVerilog development workflows by semantically classifying user intent and routing tasks to specialized hardware design agents.

The GateFlow Intent Router serves as the central intelligence hub for the GateFlow SystemVerilog development assistant. It semantically analyzes natural language queries to determine the user's specific goals—such as RTL creation, debugging, or verification—and calculates a confidence score to decide between direct execution, guided clarification (Expand Mode), or requesting more information. By building rich context and orchestrating handoffs between specialized sub-agents, it ensures that complex hardware design tasks are handled by the most appropriate tool with all necessary parameters, reducing errors and improving development velocity.

主な機能

01Semantic intent classification for hardware design and verification tasks

02Automated context building for seamless handoffs to specialized RTL agents

03Interactive 'Expand Mode' for clarifying ambiguous architectural requirements

04Intelligent confidence scoring to minimize execution errors

05Comprehensive routing for RTL creation, testbench generation, and debugging

0628 GitHub stars

ユースケース

01Clarifying vague debug requests through interactive questions and option selection

02Directly routing specific module requests to the SystemVerilog code generator

03Orchestrating end-to-end 'create and verify' workflows for complex hardware components

What are Skills?·How to Install

Install with 🐟 Skill.Fish

npx skillfish add codejunkie99/gateflow-plugin gf-router

For use in Claude.ai and ChatGPT

Download Skill