MICRO Related Work & Literature Positioning

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Constructs rigorous related-work sections for IEEE/ACM MICRO papers through systematic 5-lane literature sweeps and mechanism-level structural differentiation.

The MICRO Related Work skill assists computer architecture researchers in crafting thorough, reviewer-proof related-work sections tailored to IEEE/ACM MICRO standards. It guides authors through a comprehensive 5-lane literature sweep spanning academic ancestors across ISCA/HPCA/ASPLOS, cross-layer software solutions, tool methodology papers, workload characterizations, and critical industry disclosures like patents and Hot Chips presentations. The skill enforces structural and cost-based differentiation over superficial performance comparisons, validates venue citations via DBLP to avoid attribution errors, and enforces strict conference formatting constraints like full author lists and double-blind compliance.

主な機能

01Verifies conference venue attribution and bibliographic details using DBLP
021,086 GitHub stars
03Enforces MICRO-specific citation formatting with all-author inclusion and no et-al truncations
04Formulates mechanism-level structural and hardware cost differentiation sentences
05Maintains positioning matrices mapping neighbor papers directly to evaluation baselines
06Executes 5-lane literature sweeps across top architecture venues, tools, and industrial disclosures

ユースケース

01Auditing bibliography accuracy and author formatting to meet double-blind conference guidelines
02Structuring and drafting the related-work section for IEEE/ACM MICRO submissions
03Checking industry disclosures and patents to defend architectural novelty before review