AutoEDA
Automates complete VLSI design flows from RTL-to-GDSII by transforming natural language instructions into EDA commands using AI-powered orchestration.
About
AutoEDA is a production-grade Electronic Design Automation (EDA) platform that streamlines complex chip design workflows. It leverages a microservice architecture and AI-powered orchestration, including local LLM integration and GPT-4, to translate natural language instructions into complete RTL-to-GDSII design flows. This enables automated generation of TCL scripts, intelligent tool selection, and context-aware session management, significantly accelerating the process of VLSI design from synthesis to final routing while ensuring privacy with local processing.
Key Features
- CodeBLEU-TCL Evaluation Framework: Provides domain-specific metrics for assessing the quality of generated EDA TCL scripts.
- AI-Powered Orchestration: Transforms natural language design requirements into complete EDA flows.
- 8 GitHub stars
- Template-Driven TCL Generation: Automated script generation for commercial EDA tools from modular templates.
- Microservice Architecture: Independent, stateless services for synthesis, placement, clock tree synthesis, and routing.
- Session-Aware Workflows: Preserves context, inherits parameters, and tracks history across multi-stage design flows.
Use Cases
- Automating the entire VLSI design process from RTL-to-GDSII using natural language commands.
- Converting high-level design specifications into detailed, executable EDA tool parameters and scripts.
- Evaluating and improving the quality of automatically generated TCL scripts for electronic design automation.
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