DAC Artifact Evaluation
Packages EDA research code, benchmarks, and workflows into credible, reproducible artifacts for DAC conference submissions.
DAC Artifact Evaluation provides structured guidance for packaging electronic design automation (EDA) code, benchmark suites, and experimental workflows for ACM/IEEE Design Automation Conference (DAC) manuscripts. Because DAC historically focuses on research credibility rather than formal badge checklists, this skill helps researchers build reproducible, Dockerized environments, pin standard EDA toolchains (OpenROAD, Yosys, ABC), configure open PDKs, and design 10-minute clean-machine demos that skeptical reviewers can easily trust and verify.
Key Features
01Standardized EDA packaging workflows for open-source toolchains like OpenROAD, Yosys, and ABC
02Explicit mapping templates connecting paper QoR claims to reproducible benchmark scripts
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04Double-blind review artifact anonymization paired with post-acceptance DOI release planning
05Clean-machine and bounded-time verification protocols for rapid 10-minute reviewer demos
06Open PDK and benchmark release management for standard datasets like ISPD, EPFL, and CircuitNet
Use Cases
01Packaging accepted EDA research into a permanent, DOI-minted archive on Zenodo or Software Heritage for community citations
02Creating containerized 10-minute demo environments to validate Quality of Results (QoR) claims for skeptical reviewers
03Preparing an anonymized, reproducible code and benchmark repository for a double-blind DAC submission