DAC Experiment Auditor
Audits and structures empirical evaluations for ACM/IEEE DAC research manuscripts against standard EDA benchmarks and fair baselines.
DAC Experiment Auditor helps researchers design, structure, and audit empirical evaluations for ACM/IEEE Design Automation Conference (DAC) manuscripts. Because EDA reviewers prioritize fair, reproducible quality-of-results (QoR) over abstract novelty, this skill guides authors to benchmark across standard suites (such as ISPD, EPFL, TAU, and CircuitNet), ensure tuned state-of-the-art baselines on identical hardware, report complete PPA and runtime trade-offs, design targeted ablations, and prevent data leakage in ML-for-EDA workflows.
Key Features
01State-of-the-art baseline fairness and tuning verification on identical hardware
02Ablation experiment planning to isolate algorithmic mechanisms from parameter tuning
03Contamination-aware ML-for-EDA split integrity and cross-node generalization audits
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05Standard EDA benchmark suite selection (ISPD, EPFL, ISCAS/ITC, TAU, CircuitNet, OpenROAD)
06Complete PPA and runtime reporting floors to prevent hidden metric trade-offs
Use Cases
01Designing ablation experiments to prove algorithmic contributions over baseline tools
02Verifying ML-for-EDA model training splits to prevent design leakage and false QoR claims
03Auditing research evaluation sections before submitting to ACM/IEEE DAC