AutoEDA
Orchestrates complete Electronic Design Automation (EDA) flows, translating natural language instructions into RTL-to-GDSII chip designs using microservices and AI.
关于
AutoEDA is an advanced, AI-driven Electronic Design Automation (EDA) platform engineered to streamline and automate complex chip design workflows. It transforms natural language design requirements into comprehensive RTL-to-GDSII flows, leveraging a microservice architecture for scalability and robustness. At its core, an intelligent agent, powered by large language models, orchestrates the entire process, from synthesis to routing, while maintaining session context and ensuring privacy-focused local processing. The platform also features a specialized CodeBLEU-TCL evaluation framework for assessing the quality of generated TCL scripts, making it a powerful tool for both production-grade chip design and research in EDA automation.
主要功能
- Microservice Architecture: Four independent, stateless FastAPI services (Synthesis, Placement, CTS, Routing) for scalable, fault-isolated, and flexible design flows.
- Template-Driven TCL Generation: Automates script creation from modular templates for various EDA stages and technologies.
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- AI-Powered Workflow Management: Converts natural language to EDA parameters, handles intelligent tool selection, and resolves parameter conflicts.
- CodeBLEU-TCL Evaluation Framework: Assesses TCL script quality with domain-specific metrics, including n-gram, syntax, and dataflow analysis for EDA workflows.
- Session Management: Preserves context, inherits parameters, tracks history, and learns user preferences across multi-stage design flows.
使用案例
- Automating the entire RTL-to-GDSII chip design process using natural language commands.
- Integrating commercial EDA tools (Synopsys Design Compiler, Cadence Innovus) into an AI-orchestrated pipeline.
- Research and development in AI-driven chip design automation, including evaluation of generated EDA scripts.
