MICRO Research Topic Selection
Evaluates computer architecture projects to determine submission fit for IEEE/ACM MICRO versus ISCA, ASPLOS, HPCA, and MLSys.
MICRO Research Topic Selection guides computer architecture researchers in assessing whether a project aligns with the IEEE/ACM International Symposium on Microarchitecture (MICRO) before drafting begins. It applies rigorous mechanism-residency tests, verifies hardware cost lines (area, power, latency), and benchmarks proposals against SIGMICRO historical patterns. With a comprehensive routing framework spanning ISCA, ASPLOS, HPCA, DAC/ICCAD, SC, and MLSys, this skill helps researchers choose the optimal venue, gauge the required evaluation bar, and assess tracks like the MICRO Industry Track.
主要功能
01Provides a decision routing table across ISCA, HPCA, ASPLOS, DAC, SC, and MLSys
02Evaluates hardware cost accounting for area, power, storage, and latency budgets
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04Adjudicates borderline domains including microarchitectural security and PIM
05Applies mechanism-residency criteria to verify hardware-level contributions
06Generates structured venue-fit assessments with targeted submission deadlines
使用场景
01Determining whether a microarchitectural mechanism belongs at MICRO, ISCA, or HPCA
02Evaluating production silicon and deployment retrospectives for the MICRO Industry Track
03Assessing if cross-stack hardware-software co-design should route to ASPLOS