Explora nuestra colección completa de Habilidades de Claude que extienden las capacidades de los agentes de IA.
Facilitates strategic product discovery by mapping business outcomes to customer needs and testable solutions using the Opportunity Solution Tree framework.
Structures and executes product launches using a tiered framework to ensure coordinated releases and effective go-to-market strategies.
Recalls and analyzes past Claude Code sessions by indexing local transcripts and generating structured activity summaries.
Analyzes WordPress codebases to identify performance bottlenecks, database inefficiencies, and caching anti-patterns.
Validates and repairs SDLC Layer Separation Architecture implementations through automated cross-referencing and metadata checks.
Streamlines the setup, configuration, and execution of Zigbee Unified Test Harness (ZUTH) for official device certification testing.
Orchestrates SystemVerilog development workflows by semantically classifying user intent and routing tasks to specialized hardware design agents.
Orchestrates parallel SystemVerilog RTL design and verification by decomposing complex hardware architectures into manageable components.
Manages Jira tickets, backlogs, and issue lifecycles directly through natural language commands within Claude.
Maps and documents complex SystemVerilog codebases using parallel AI agents to accelerate hardware design onboarding and architectural analysis.
Scaffolds and guides the development of Screenly Edge Apps using Figma designs and standardized templates.
Generates comprehensive RTL implementation plans and architectural specifications for SystemVerilog hardware design.
Facilitates interactive SystemVerilog mastery through curriculum-based exercises, automated solution reviews, and guided hints.
Compiles and executes SystemVerilog simulations using Verilator with automated file classification and structured result reporting.
Builds reliable, event-driven background jobs and durable serverless workflows without managing complex infrastructure or queues.
Lints SystemVerilog code using Verilator to identify design errors, warnings, and performance bottlenecks with structured feedback.
Automates the entire SystemVerilog hardware design lifecycle, from architecture planning and RTL generation to automated linting and simulation-based verification.
Refines ambiguous SystemVerilog requests through interactive clarification and architectural trade-off analysis.
Implements professional-grade SystemVerilog verification patterns and layered testbench architectures for robust RTL validation.
Automates the conversion of Vertica DDL into production-ready dbt models optimized for Snowflake Data Cloud.
Simplifies SystemVerilog development by converting complex Verilator lint and simulation outputs into actionable, readable reports.
Conducts comprehensive code reviews focusing on security vulnerabilities, performance bottlenecks, and architectural best practices.
Automates the end-to-end GitHub pull request process including branch management, rebasing, and PR creation.
Streamlines Salesforce B2C Commerce development by generating standardized cartridges, controllers, hooks, and custom APIs from templates.
Generates distinctive, production-grade frontend interfaces with high design quality and unique creative character.
Analyzes Federal Election Commission campaign finance filings and reports directly within the Claude environment.
Optimizes data retrieval in Salesforce B2C Commerce using index-backed search APIs and performance-first querying patterns.
Exports and lists Page Designer content from Salesforce B2C Commerce libraries using the B2C CLI.
Guides users through the automated setup, project detection, and configuration of the Agentic Loop autonomous coding toolkit.
Streamlines the synchronization of Litestar Python backends with Vite frontend assets and development workflows.
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