Browse All Agent Skills

DevSQL Querying & Analytics

Analyzes Claude Code interaction history and Git data through SQL queries to reveal developer productivity patterns.

Code Reviewer & Security Auditor

Conducts comprehensive code reviews focusing on security vulnerabilities, performance bottlenecks, and architectural best practices.

Agentic Loop Onboarding

Guides users through the automated setup, project detection, and configuration of the Agentic Loop autonomous coding toolkit.

Screenly Edge App Creator

Scaffolds and guides the development of Screenly Edge Apps using Figma designs and standardized templates.

FEC Filing Analysis

Analyzes Federal Election Commission campaign finance filings and reports directly within the Claude environment.

Frontend Design

Generates distinctive, production-grade frontend interfaces with high design quality and unique creative character.

GitHub Pull Request Workflow

Automates the end-to-end GitHub pull request process including branch management, rebasing, and PR creation.

Vertica to dbt Snowflake Migration

Automates the conversion of Vertica DDL into production-ready dbt models optimized for Snowflake Data Cloud.

Playwright E2E Debugger

Debugs and fixes Playwright end-to-end tests for browser extensions while minimizing flakiness in dynamic environments.

GF Plan - Hardware Design Architect

Generates comprehensive RTL implementation plans and architectural specifications for SystemVerilog hardware design.

GateFlow SystemVerilog Learning Mode

Facilitates interactive SystemVerilog mastery through curriculum-based exercises, automated solution reviews, and guided hints.

Gateflow SystemVerilog Lint

Lints SystemVerilog code using Verilator to identify design errors, warnings, and performance bottlenecks with structured feedback.

Gateflow Architect

Maps and documents complex SystemVerilog codebases using parallel AI agents to accelerate hardware design onboarding and architectural analysis.

Gateflow SystemVerilog Orchestrator

Automates the entire SystemVerilog hardware design lifecycle, from architecture planning and RTL generation to automated linting and simulation-based verification.

Inngest Workflow Automation

Builds reliable, event-driven background jobs and durable serverless workflows without managing complex infrastructure or queues.

GateFlow Expand

Refines ambiguous SystemVerilog requests through interactive clarification and architectural trade-off analysis.

GateFlow Verilator Lint Summary

Simplifies SystemVerilog development by converting complex Verilator lint and simulation outputs into actionable, readable reports.

GF Sim (SystemVerilog Simulator)

Compiles and executes SystemVerilog simulations using Verilator with automated file classification and structured result reporting.

Jira Issue Manager

Manages Jira tickets, backlogs, and issue lifecycles directly through natural language commands within Claude.

GateFlow Intent Router

Orchestrates SystemVerilog development workflows by semantically classifying user intent and routing tasks to specialized hardware design agents.

SystemVerilog Testbench Best Practices

Implements professional-grade SystemVerilog verification patterns and layered testbench architectures for robust RTL validation.

Gateflow Build Orchestrator

Orchestrates parallel SystemVerilog RTL design and verification by decomposing complex hardware architectures into manageable components.

Product Bet Sizing

Evaluates product initiatives using Bezos's decision framework and Shape Up's appetite model to optimize resource allocation and project scoping.

Scope Cutting

Refines project scope using Shape Up's appetite-first approach to ensure fast, high-quality delivery within fixed time constraints.

Product Positioning

Guides product positioning strategy using the Obviously Awesome framework to define differentiation and market categories.

Professional PRD Writing

Generates concise, evidence-driven Product Requirements Documents (PRDs) that bridge the gap between product vision and engineering execution.

Product Launch Planner

Structures and executes product launches using a tiered framework to ensure coordinated releases and effective go-to-market strategies.

Feature Prioritization

Prioritizes product backlogs and feature requests using quantitative RICE scoring and the Linear enabler/blocker framework.

Web Browser

Interacts with web pages by remote controlling Chrome or Chromium browsers using the Chrome DevTools Protocol.

Problem Validation Framework

Evaluates market demand and problem-solution fit using an evidence-based scoring framework to prevent building products nobody wants.